[2026 Campus] NPU Physical Design Engineer

Job Description[What you will do]
• Responsible for physical design and development activities of MediaTek Ghz, AI processors and neural network DSP
• Involve in activities encompass physical design and analysis of complex and timing-critical AI processors and neural network DSP Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing, power optimization and physical verification
• Work closely with MediaTek colleagues in Taiwan and Singapore in implementation methodology co-development and flow deployment

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Requirement[What you will bring]
• Bachelor/Masters Degree in Electrical/Computer Engineering
• High-speed NPU/GPU/CPU Subsystem RTL Integration experience or IP/Block/SoC Design experience is preferred (Candidate with less than 5 years of relevant experience will be considered for junior position)
• Experience with Synopsys ICC2/FC (preferred) or Cadence Innovus tools from netlists to GDS
• Experience in high-speed processor implementation/power reduction flows and methodology from RTL to GDS (including synthesis, floor-planning, placement, CTS, routing, timing optimization, physical verification)
• Experience with power noise and reliability tools such as Redhawk and Voltus
• Experience with timing signoff tools such as PrimeTime and Tempus and timing closure tools such as Tweaker and PrimeClosure
• Knowledge of high-speed/low power IP and custom circuit design
• Good communication and scripting skills