Role Overview
Responsible for end-to-end backend digital IC design, including layout, placement, routing, and physical verification for advanced SoC technologies.
Key Responsibilities
Execute P&R, extraction, physical verification, STA, and ECO.
Develop and adapt automation flows for backend processes.
Ideal Requirements
Master's or PhD in EE, CS, Math, Physics, or related.
Strong knowledge of backend digital design and EDA tools (Genus, Innovus, Quantus, Tempus, DC, Star‐RCXT, PrimeTime, PrimeRail, Voltus, Redhawk).
Proficient in handling EDA tools across floorplan/partition/placement/CTS/route stages for SoC top‐level.
Proficient in timing/physical constraints and scripting (Tcl, Perl).
How to Apply
If you would like to be considered for this opportunity, please forward a copy of your full CV to ***********@ambition.com.sg.
Business Registration Number : D | Licence Number : 10C5117 | EA Registration Number: R
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