We are seeking a detail-oriented and statistically savvy
Defense Line Engineer
to join our
Assembly and Test Central Quality Engineering (ATCQE)
team in Singapore under Global Quality.
This role is pivotal in strengthening Defense Line controls by championing, governing, and validating key quality signals (KPIVs and KPOVs) across Global Assembly and Test areas.
The ideal candidate will have a strong foundation in quality engineering and a passion for data-driven decision-making.
Key Responsibilities
Champion
Defense Line initiatives by identifying and amplifying critical KPIV/KPOV signals that impact product quality and reliability.
Govern
the integrity of Defense Line controls through robust statistical monitoring, signal validation, and cross-functional alignment.
Validate
quality signals using statistical tools and engineering judgment to ensure timely detection and containment of risks.
Collaborate with cross-functional teams (Assembly, Test, and Quality) to drive continuous improvement in Defense Line signal effectiveness.
Develop and maintain dashboards, control charts, and signal tracking systems to monitor quality performance.
Lead root cause analysis and corrective action efforts for signal excursions and quality events.
Support audits and compliance activities by ensuring Defense Line controls meet internal and external standards.
Qualifications
Bachelor’s or Master’s degree in Engineering (Electrical, Mechanical, Industrial, or related field) or Applied Statistics.
2+ years of experience in Quality Engineering, preferably in semiconductor Assembly/Test environments.
Strong analytical skills with proficiency in statistical tools (e.g., JMP, Minitab, Python, or R).
Experience with SPC, DOE, and signal validation methodologies.
Detail-oriented with a structured approach to problem-solving and data analysis.
Excellent communication and collaboration skills across technical and non-technical teams.
Familiarity with quality systems, audits, and industry standards (e.g., IATF 16949, ISO 9001) is a plus.
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