Package Design Engineer
Responsible for product and tooling design.
Candidates with wafer bumping, WLCSP, BGA or fanout packaging experience are encouraged.
Responsibilities
Generate, update, and revise electrical routing layout based on netlist or customer design.
Generate test vehicle design and related PCB design.
Generate reticle and stencil design.
Generate other schematics or drawings as requested.
Review, maintain and update design guidelines.
Manage conversion of internal design into suppliers’ final design.
Document all drawing revisions and change records.
Perform any other ad‐hoc duties as assigned.
Requirements
Minimum degree in electrical engineering or related discipline.
Good understanding of design guidelines and experience generating risk assessment reports for Fan‐in/Fan‐out processes.
Experience using Cadence APD for RDL routing and mask design for wafer‐level processes including Wafer bumping, WLCSP, BGA, eWLB, and other fan‐out processes (advantage).
Hands‐on skills with design software tools such as LinkCad, Cadence, CAM350, AutoCAD, GDS, Gerber editors.
Experience with PCB test board design.
Fresh graduates are welcome to apply.
Seniority Level
Entry level
Employment Type
Full‐time
Job Function
Design, Engineering, and Manufacturing
Industries
Semiconductors
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