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Urgent! Research Fellow (Front-end design (RTL) Scientist for Heterogeneous Systems) Job Opening In Singapore, Singapore – Now Hiring Nanyang Technological University Singapore

Research Fellow (Front end design (RTL) Scientist for Heterogeneous Systems)



Job description

Research Fellow (Front-end design (RTL) Scientist for Heterogeneous Systems)
Join to apply for the
Research Fellow (Front-end design (RTL) Scientist for Heterogeneous Systems)
role at
Nanyang Technological University Singapore .


The Continental-NTU Corp Lab is a strategic research collaboration between NTU and Continental, focusing on developing advanced solutions in sustainable materials engineering, artificial intelligence, communications, and cybersecurity for future urban mobility applications.

We aim to develop innovative solutions for commercialization into products and services for Continental, in collaboration with its business units.


We are seeking a highly motivated researcher to join our team focused on heterogeneous integration and security of chiplet-based IC systems.

This role involves R&D in chiplet-based architectures, aiming to demonstrate secure, intelligent computing platforms that outperform traditional compute platforms.

Applicants will join the Continental-NTU Corporate Lab research team as a full-time Research Fellow.


Key Responsibilities
Conduct research on hetero-design / chiplet-based systems, focusing on security of components and interconnects across chiplets.


Develop new IC design concepts for embedded ARM and RISC-V architectures.


Investigate system design aspects including topology exploration, routing algorithms, protocol and flow control, chiplet and interposer design strategies, SiP and chiplet architecture, fault tolerance, robustness, reliability, and hardware security features.


Prototype and design architectural innovations, including chiplet architectures and NoC enhancements, with a focus on security, hardware security functions, hardware root-of-trusts (RoT), and cryptographic agility.


Utilize tools such as Xilinx Vivado, Cadence Virtuoso, Synopsys, etc., for design and simulation.


Contribute to research strategy, white papers, and vision documents.


Publish research in top-tier conferences and journals.


Job Requirements
PhD or equivalent in Electrical Engineering, Computer Engineering, Computer Science, or related fields.


Strong background in IC front-end design, interconnection networks, and security architectures.


Research expertise in IC front-end design, chiplet design, heterogeneous integration, cryptographic hardware engineering, or system-level modeling and simulation.


Proven publication record in relevant peer-reviewed venues.


Excellent analytical, problem-solving, and system-level thinking skills.


Strong communication skills and ability to work independently and collaboratively.


Only shortlisted candidates will be notified.

We regret that this job is active and accepting applications.


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