Experience Required : 10+ years
Technical Requirements:
o Advanced System Verilog and RTL coding skills
o Expert knowledge of IP integration methodologies
o Experience with ARM CPU subsystem integration
o Understanding of high-speed I/O integration (PCIe 4.0, USB 3.2)
o Clock domain crossing (CDC) and metastability handling
o Reset synchronization and power sequencing
o Lint, CDC, and RDC tool expertise (SpyGlass, Meridian)
o Synthesis-aware RTL coding practices
o CPU subsystem integration and wrapper development
o High-speed I/O subsystem integration
o Top-level SoC integration and connectivity
o Integration methodology and guidelines
o Cross-clock domain integration
o Integration verification and debugging