Responsibilities
Discussion with system engineers on SoC architecture and feedback on optimization.
Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc.
Discussion with synthesis engineer and back-end engineer on design optimization.
SoC DFT support.
SoC verification plan and SoC verification support.
Job Requirements
Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.
Knowledge of ASIC design flow.
Experience in RTL coding, RTL and gate-level debug.
Understanding of DFT, timing and power requirements.
Familiar with UNIX/Linux environment and scripting.
Good communication and interpersonal skills.
Strong analytical and problem-solving skills.
Knowledge on mixed-signal design would be an advantage.
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