Responsibilities
Responsibility for test plans, testbench documentation and implementation.
Use SystemVerilog language, SVA and UVM methodology for block level verification.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and show progress towards tape‐out.
Write scripts to automate routine parts of verification workflow.
Job Requirements
Bachelor's degree in Electrical Engineering, Telecommunications, or related field.
Minimum 3 years industry experience in GPON network engineering or related roles, with specific experience managing GPON networks.
Proficiency in GPON equipment such as OLTs, ONTs, ONUs, and their configurations.
Strong understanding of GPON protocols and standards, including ITU‐T G.984.x series.
Experience verifying digital logic at RTL using SystemVerilog for FPGAs and/or ASICs.
Experience creating and using verification components and environments in standard verification methodology.
Strong problem‐solving skills and ability to diagnose and resolve GPON network‐related issues.
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