We are a chip design company invested by an international consortium and founded by a senior chip design technical team.The company is headquartered in Singapore and will take root in Singapore for long-term development.The company has strong R&D capabilities and its core technical team members all have more than 10 years of experience in chip design.We have rich industry experience and deep practical accumulation in ASIC design and business management.
Our office is located in one North and walking distance from MRT.
We provide competitive salary and compensation package for the right candidate.
We have work-life balance environment.
Job Description:
Works with the front-end design team to complete the chip floorplan , clock architecture, and powerplan .
Takes charge of the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.
Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.
Position Requirements:
Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.
At least 5 years of work experience in the digital backend design field.
Hands-on project experience is required.
Tapeout experience at advanced technology is prefered.
Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be a plus.
Strong communication ability to coordinate with related stakeholders, good confidence and self-movitation.
5.Good teamwork spirit.